Example embodiments disclosed herein pertain to electrical and electronic circuitry. More particularly, example embodiments disclosed herein pertain to the provision of power to electronic circuitry.
Low-voltage DC-powered microelectronics system generally require additional hold-up time after loss of system power. Examples include but not are not limited to: Solid State Drives (“SSD”), PCI and PCI Plug-in Cards. “Hold-up time” is defined herein as that interval of time between when system DC input power is lost until the energy storage within the system is unable to continue system operation.
During hold-up time, a device receives a signal or “alert” that indicates that there is a reduction in power and thus that it is necessary to perform any tasks which must be completed before there is a complete loss of power. Such tasks include, for example, the transfer of data in volatile storage to non-volatile storage. The voltage needed to perform these tasks is generally provided by a capacitor which stores energy during normal operation so that it can become a secondary supply of power during the hold-up time.
The SSD market is a rapidly expanding market competing against Hard Disk Drives (“HDD”) as the next-generation memory storage solution. SSD's high speed, high reliability, and high resilience against environmental stresses, such as shock and vibration, as compared to HDDs enable highly mobile and ruggedized applications. As personal communications and computing devices become more mobile, products look to SSDs as a preferred memory solution technology. However, SSDs are more sensitive to power loss than HDDs, making an adequate hold-up time important to the use of such devices.
FIG. 1 is a circuit diagram depicting a hold-up circuit of the prior art which utilizes a very large capacitor known as a “SuperCap.” In this particular example, the SuperCap is approximately 1.5 Farads. The SuperCap is charged by the input voltage, 5 volts in this case, through a charging diode. When the input voltage is removed, e.g. by opening the power switch, the SuperCap continues to supply power to the system's DC-to-DC converters for a hold-up period so that the system can be powered down gracefully.
A problem with SuperCap hold-up circuits is that the SuperCaps are physically large and are quite expensive. Furthermore, SuperCaps are rather inefficient with respect to their charge-to-voltage (CV) volume. This results in a low hold-up Cap Voltage and therefore has very limited discharge voltage excursion as set forth by the equation:
  E  =            1      2        ⁢                  ⁢          C      ⁡              (                              V            2            2                    -                      V            1            2                          )            
FIG. 2 is a circuit diagram depicting another hold-up circuit of the prior art. This circuit uses separate boost converter and buck converter circuits as indicated by the broken lines. The Boost converter circuit charges capacitor C2 during normal operation so that it can become a secondary supply of power during hold-up time. The charging of capacitor C2 is performed via a Boost inductor which converts power from a lower voltage to a higher voltage. A Boost controller VR1 is used to control the rate of energy transfer into C2 by switching a field effect transistor (FET) on and off.
During hold-up time, power from C2 is used to maintain capacitor C1 at a prescribed voltage. The power is converted from a higher voltage to a lower voltage via a Buck inductor. The energy transfer is controlled by Buck controller VR2 which controls two FETs to control the rate at which energy is transferred. The two controllers VR1 and VR2 are controlled by a system controller which activates VR1 and VR2 accordingly.
Unfortunately, prior art implementations of hold-up circuits such as the one illustrated are expensive in terms of part costs and tend to be bulky due to their many (and sometimes large) components. What is needed is a hold-up circuit which reduces overall costs, has a small form-factor and reacts to the dynamically changing power environment present in devices like SSDs and others.
These and other limitations of the prior art will become apparent to those of skill in the art upon a reading of the following descriptions and a study of the several figures of the drawing.